The power and capacity of computing components such as microprocessors and memory circuits has been increasing for the last 50 years, as the size of the functional units, such as transistors, has been decreasing. This trend is now reaching a limit, however, as it is difficult to make the current functional units (such as MOSFETs) any smaller without affecting their operation.
The technology employed to manufacture conventional silicon integrated circuits has developed over the last 50 years and is today well established. Current microprocessors feature several hundreds of millions of transistors which are manufactured in high-throughput lines.
Developments are ongoing to implement new types of advanced processing apparatus that can implement powerful computations using a different approach than current processors. Such advanced processing apparatus promise computational capacities well beyond current devices. For example, quantum processors are being developed which can perform computations according to the rules of quantum mechanics. Approaches to the realisation of devices for implementing quantum bits (qubits), the basic computational unit of a quantum processor, and quantum architectures, have been explored with different levels of success.
The most promising routes towards large-scale universal quantum computing all require quantum error correction, a technique that enables the simulation of ideal quantum computation using realistic noisy qubits, provided that the noise is below a fault-tolerant threshold.
Some quantum error correction methods, such as the ‘surface code’, allow for error thresholds as high as 1%. Such errors levels can be achieved using a number of qubit platforms. However, the implementation of the surface code requires a large number of qubits and therefore a platform that can be scaled-up to a large number of qubits, such as 108. The requirement for such a large number of qubits creates a challenge in the field of quantum computing, even for the most promising platforms.
In order to manufacture an ‘error-corrected quantum computer’, a scalable architecture is required. Such architecture would ideally incorporate large numbers of qubits, disposed in relatively close proximity to each other, operating in synergy to implement error-corrected quantum computation. In addition, the architecture should be feasible to manufacture.